User manual MSI G52-75141XD V3.0

[. . . ] P45D3 Neo3/ P43D3 Neo3 Series MS-7514 (v3. X) Mainboard G52-75141XD i Copyright Notice T he material in this doc ument is the intellec tual property of M ICRO-STAR INTERNATIONAL. We take every care in the preparation of this document, but no guarantee is given as to the correctness of its contents. Our products are under continual improvement and we reserve the right to make changes without notice. Trademarks All trademarks are the properties of their respective owners. NVIDIA, the NVIDIA logo, DualNet, and nForce are registered trademarks or trademarks of NVIDIA Corporation in the United States and/or other countries. [. . . ] This field will appear after you installed the CPU which support speedstep technology. Adjust CPU FSB Frequency (M Hz) This item allows you to set the CPU FSB frequency (in MHz). Adjusted CPU Frequency (M Hz) It shows the adjusted CPU frequency (FSB x Ratio). Advance DRAM Configuration Press <Enter> to enter the sub-menu and the following screen appears. 3-22 BIOS Setup MEMORY-Z Press <Enter> to enter the sub-menu and the following screen appears. DIM M1~4 Memory SPD Information Press <Enter> to enter the sub-menu and the following screen appears. These items display the current status of the current DIMM Memory speed information such as memory type, max bandwidth, manufacture, part number, serial number, SDRAM cycle time, and etc. DRAM Timing Mode Setting to [Auto] enables the advance memory timing automatically to be determined by BIOS. CAS Latency (CL) This controls the CAS latency, which determines the timing delay (in clock cycles) before SDRAM starts a read command after receiving it. tRCD W hen DRAM is refreshed, both rows and columns are addressed separately. This setup item allows you to determine the timing of the transition from RAS (row address strobe) to CAS (column address strobe). tRP This setting controls the number of cycles for Row Address Strobe (RAS) to be allowed to precharge. If insufficient time is allowed for the RAS to accumulate its charge before DRAM refresh, refresh may be incomplete and DRAM may fail to retain data. This item applies only when synchronous DRAM is installed in the system. 3-23 M S-7514 M ainboard tRAS This setting determines the time RAS takes to read from and write to memory cell. TRTP W hen the Adcance M emory Setting sets to [Manual], the field is adjustable. TRFC W hen the Adcance M emory Setting sets to [Manual], the field is adjustable. This setting determines the time RFC takes to read from and write to a memory cell. TWR W hen the Adcance M emory Setting sets to [Manual], the field is adjustable. Minimum time interval between end of write data burst and the start of a precharge command. TRRD W hen the Adcance M emory Setting sets to [Manual], the field is adjustable. TWTR W hen the Adcance M emory Setting sets to [Manual], the field is adjustable. Minimum time interval between the end of write data burst and the start of a column-read command. It allows I/O gating to overdrive sense amplifiers before read command starts. Select [1N] makes SDRAM signal controller to run at 1N (N=clock cycles) rate. Powre User M ode Press <Enter> to enter the sub-menu and the following screen appears. [. . . ] You should be prompted to insert a floppy disk containing the JMicron RAID driver into the A: drive. Important Please follow the instruction below to make an "JMicron RAID Driver" for yourself. Copy all the contents in the \\IDE\JMicron\Floppy32 (for 32-bit OS) or \\IDE\JMicron\Floppy64 (for 64-bit OS) to a formatted floppy disk. W hen prompted, insert the floppy disk you created in step 3 and press Enter. The next screen should confirm that you have selected the JMicron RAID controller. [. . . ]