User manual MATLAB SIMULINK HDL CODER RELEASE NOTES

[. . . ] Simulink® HDL CoderTM Release Notes How to Contact The MathWorks Web Newsgroup www. mathworks. com/contact_TS. html Technical Support www. mathworks. com comp. soft-sys. matlab suggest@mathworks. com bugs@mathworks. com doc@mathworks. com service@mathworks. com info@mathworks. com Product enhancement suggestions Bug reports Documentation error reports Order status, license renewals, passcodes Sales, pricing, and general information 508-647-7000 (Phone) 508-647-7001 (Fax) The MathWorks, Inc. 3 Apple Hill Drive Natick, MA 01760-2098 For contact information about worldwide offices, see the MathWorks Web site. Simulink® HDL CoderTM Release Notes © COPYRIGHT 2007­2010 by The MathWorks, Inc. The software described in this document is furnished under a license agreement. The software may be used or copied only under the terms of the license agreement. [. . . ] The generic RAM template implements clock enable with logic in a wrapper around the RAM. You may want to use the generic RAM style if your synthesis tool does not support RAM structures with a clock enable, and cannot map generated HDL code to FPGA RAM resources. To learn how to use generic style RAM for your design, see the new Getting Started with RAM and ROM in Simulink demo. To open the demo, type the following command at the MATLAB prompt: hdlcoderramrom 34 Version 1. 5 (R2009a) Simulink® HDL CoderTM Software Generating ROM with Lookup Table and Unit Delay Blocks Simulink HDL Coder does not provide a ROM block, but you can easily build one using basic Simulink blocks. The new Getting Started with RAM and ROM in Simulink demo includes an example in which a ROM is built using a Lookup Table block and a Unit Delay block. To open the demo, type the following command at the MATLAB prompt: hdlcoderramrom 35 Simulink® HDL CoderTM Release Notes Version 1. 4 (R2008b) Simulink HDL Coder Software This table summarizes what's new in Version 1. 4 (R2008b): New Features and Changes Yes Details below Version Compatibility Considerations Yes--Details labeled as Compatibility Considerations, below. Fixed Bugs and Known Problems Bug Reports Related Documentation at Web Site No New features and changes introduced in this version are: · "New hdldemolib Blocks Support FFT, HDL Counter, and Bitwise Operators" on page 37 · "Additional Simulink Blocks Supported for HDL Code Generation" on page 39 · "Complex Signals Supported for Additional Blocks" on page 39 · "Code Annotation Support" on page 40 · "New Constant Block Implementation Indicates Hi-Z or Unknown States" on page 41 · "New Test Bench Reference Postfix Option" on page 41 · "New Default HDL Implementations for Selected Blocks" on page 43 · "Default Entity Conflict Postfix Changed" on page 44 · "New DistributedPipelining Implementation Parameter for Embedded MATLAB Function Blocks and Stateflow Charts" on page 44 · "Coefficient Multiplier Optimization for Digital Filter, FIR Decimation, and FIR Interpolation Filters" on page 45 · "hdlnewblackbox Function Generates Black Box Control Statements" on page 46 36 Version 1. 4 (R2008b) Simulink® HDL CoderTM Software · "hdlnewcontrolfile Function Optionally Returns Result to String" on page 47 · "-novopt Flag Added to Default Simulation Command in Generated Compilation Scripts" on page 47 New hdldemolib Blocks Support FFT, HDL Counter, and Bitwise Operators The hdldemolib library now includes HDL-specific block implementations supporting simulation and code generation for: · Counter with count-limited and free-running modes (see "HDL Counter" in the Simulink HDL Coder documentation) · Minimum resource FFT (see "HDL FFT" in the Simulink HDL Coder documentation) · Bitwise operations, including bit slice, bit reduction, bit concatenation, bit shift, and bit rotation (see "Bitwise Operators" in the Simulink HDL Coder documentation) The following figure shows the hdldemolib library window. See "The hdldemolib Block Library" in the Simulink HDL Coder documentation for more information about the library. 37 Simulink® HDL CoderTM Release Notes 38 Version 1. 4 (R2008b) Simulink® HDL CoderTM Software Additional Simulink Blocks Supported for HDL Code Generation The coder now supports the following blocks for HDL code generation: · Signal Processing Blockset/Multirate Filters/CIC Interpolation · Signal Processing Blockset/Multirate Filters/FIR Interpolation (See the demo "Digital Down Converter for HDL Code Generation" for an example of the use of this block. ) · Signal Processing Blockset/Filtering /Adaptive Filters/LMS Filter (See the demo "Adaptive Noise Canceler with LMS Filter" for an example of the use of this block. ) · simulink/Logic and Bit Operations/Extract Bits · simulink/Math Operations/Math Function (now supports hermitian, and transpose functions for HDL code generation) · simulink/Model-Wide Utilities/DocBlock · Stateflow Truth Table In addition, several HDL-specific block implementations have been added to the hdldemolib library. See "New hdldemolib Blocks Support FFT, HDL Counter, and Bitwise Operators" on page 37. See "Summary of Block Implementations" in the Simulink HDL Coder documentation for a complete listing of blocks that are currently supported for HDL code generation. Complex Signals Supported for Additional Blocks In the previous release, the coder introduced support for use of complex signals with a limited set of blocks. In R2008b, the coder supports complex signals for these additional blocks: · dspadpt3/LMS Filter · dspsigattribs/Frame Conversion · dspsigops/Delay (DSPDelayHDLEmission implementation) 39 Simulink® HDL CoderTM Release Notes · hdldemolib/Dual Port RAM · hdldemolib/Simple Dual Port RAM · hdldemolib/Single Port RAM · hdldemolib/HDL FFT · simulink/Commonly Used Blocks/Relational Operator (~= and == operators only) · simulink/Discrete/Memory · simulink/Discrete/Zero-Order Hold · simulink/Logic and Bit Operations/Compare To Constant · simulink/Logic and Bit Operations/Compare To Zero · simulink/Lookup Tables/Lookup Table (LookupHDLInstantiation implementation) · simulink/Math Operations/Assignment · simulink/Math Operations/Math Function (hermitian, transpose) · simulink/Signal Attributes/Signal Specification See "Blocks That Support Complex Data" in the Simulink HDL Coder documentation for a complete listing of blocks that support complex signals. Code Annotation Support The coder now lets you add text annotations to generated code, in the form of comments. There are two ways to add annotations to your code: · Enter text directly on the block diagram as Simulink annotations. · Place a DocBlock at the desired level of your model and enter text comments. See "Annotating Generated Code with Comments and Requirements" in the Simulink HDL Coder documentation for further information. 40 Version 1. 4 (R2008b) Simulink® HDL CoderTM Software New Constant Block Implementation Indicates Hi-Z or Unknown States The coder now supports an implementation for the built-in/Constant block (hdldefaults. ConstantSpecialHDLEmission), which you can use to indicate when a constant signal is in high-impedance ('Z') or unknown ('X') state. The implementation provides the {Value} parameter to indicate the state, as follows: · {Value, 'Z'}: If the signal is in a high-impedance state, the Constant block emits the character 'Z' for each bit in the signal. For example, for a 4-bit signal, 'ZZZZ' would be emitted. {Value, 'Z'} is the default value for this implementation. · {Value, 'X'}: If the signal is in an unknown state, the Constant block emits the character 'X' for each bit in the signal. For example, for a 4-bit signal, 'XXXX' would be emitted. hdldefaults. ConstantSpecialHDLEmission does not support the double data type. See also "Blocks with Multiple Implementations" in the Simulink HDL Coder documentation. New Test Bench Reference Postfix Option The new Test bench reference postfix option (shown in the following figure) lets you customize the names of reference signals generated in test bench code by specifying a string to be appended to reference signal names. The default string is'_ref'. 41 Simulink® HDL CoderTM Release Notes If you generate test bench code via the makehdltb function, use the Testbenchreferencepostfix property (see TestBenchReferencePostFix in the in the Simulink HDL Coder documentation) to specify the postfix string. 42 Version 1. 4 (R2008b) Simulink® HDL CoderTM Software New Default HDL Implementations for Selected Blocks The default HDL implementations for certain blocks has been changed. The following table lists these blocks, as well as their new default implementations and previous default implementations. Block simulink/Commonly Used Blocks/Data Type Conversion simulink/Commonly Used Blocks/Product simulink/Math Operations/Divide simulink/Math Operations/Product of Elements simulink/Commonly Used Blocks/Sum simulink/Math Operations/Add simulink/Math Operations/Sum of Elements simulink/Math Operations/Subtract simulink/Commonly Used Blocks/Unit Delay simulink/Math Operations/MinMax dspstat3/Maximum dspstat3/Minimum Default Implementation Before Release R2008b DataTypeConversionHDLEmission ProductLinearHDLEmission New Default Implementation DataTypeConversionRTW ProductRTW ProductLinearHDLEmission ProductLinearHDLEmission ProductRTW ProductRTW SumLinearHDLEmission SumLinearHDLEmission SumLinearHDLEmission SumLinearHDLEmission UnitDelayHDLEmission MinMaxTreeHDLEmission MinMaxTreeHDLEmission MinMaxTreeHDLEmission SumRTW SumRTW SumRTW SumRTW UnitDelayRTW MinMaxTree MinMaxTree MinMaxTree 43 Simulink® HDL CoderTM Release Notes Compatibility Considerations If your models use default HDL block implementations for the affected blocks, the coder will now default to the new implementations. The new implementations are compatible with the previous implementations and will produce identical results. [. . . ] See "Generating Selection/Action Statements with the hdlnewforeach Function" for details. Summary of GUI Updates The following updates have been made to the Simulink HDL Coder GUI: 67 Simulink® HDL CoderTM Release Notes · The Enable prefix option is now supported by the GUI as well as by the EnablePrefix command-line property. See "Enable prefix" for details on this option. · The default value for the Synthesis termination field of the EDA Tool Scripts dialog box has changed, as shown in the following figure. The default hardware target string in generated synthesis scripts now specifies - technology option: VIRTEX4 In previous releases, this option defaulted to VIRTEX2. part option: XC4VSX35 In previous releases, this option defaulted to XC2V500. 68 Version 1. 2 (R2007b) Simulink® HDL CoderTM Software See also "Default Hardware Target for Synthesis Scripts Updated to Virtex-4 " on page 70. Digital Filter Block Restriction Removed In previous releases, Filter Design HDL CoderTM software was required to generate HDL code for the Digital Filter block when the Dialog parameters option was selected in the Coefficient source option group. In the current release, the HDL code generation requirements for the Digital Filter block vary according to the Coefficient source option you select, as follows: · Dialog parameters: No additional toolboxes or blocksets required for HDL code generation. 69 Simulink® HDL CoderTM Release Notes · Discrete-time filter object: Filter Design HDL Coder software required. [. . . ]