User manual DAEWOO DTH-29U7 SERVICE MANUAL

[. . . ] S/M No. TCP830FEF0 CHASSIS : CP-830F MODEL : DTH-29U7 DTH-29U8 DTH-2881 DTH-28W8 DTH-28W9 OTC 2003 CP830F Service Manual CONTENTS DOCUMENT HISTORY 1 MAIN FEATURES 1. 1 SPECIFICATIONS 1. 1. 1 GENERAL 1. 1. 2 EURO-SCART 1 (21 Pin) 1. 1. 3 EURO-SCART 2 (21 Pin) 1. 2 CHANNEL/FREQUENCY TABLE 1. 3 ATSS SORTING METHOD 1. 3. 1 GENERAL CASE 1. 3. 2 SPECIAL CASE 2 SAFETY INSTRUCTION 3 ALIGNMENT INSTRUCTIONS 3. 1 MICROCONTROLLER CONFIGURATION : SERVICE MODE 3. 2 SERVICE MODE NAVIGATION 3. 3 MICROCONTROLLER CONFIGURATION : OPTION BITS 3. 3. 1 OPTION 1 3. 3. 2 OPTION 2 3. 4 TV SET ALIGNMENT 3. 4. 1 LOCAL OSCILLATOR ALIGNMENT 3. 4. 2 G2 ALIGNMENT 3. 4. 3 WHITE BALANCE 3. 4. 4 FOCUS 3. 4. 5 VERTICAL GEOMETRY 3. 4. 6 HORIZONTAL PICTURE CENTRING 3. 4. 7 EAST / WEST CORRECTION 3. 4. 8 AGC 4 IC DESCRIPTION 4. 1 TELETEXT DECODER WITH EMBEDDED 8-BIT CONTROLLER 4. 1. 1 BLOCK DIAGRAM OF THE SDA55XX 4. 1. 2 DESCRIPTION 4. 1. 3 IC MARKING AND VERSION 4. 1. 4 PINNING 4. 2 VSP9412A - SCAN RATE CONVERTER INCLUDING MULTISTANDARD COLOUR DECODER 4. 2. 1 BLOCK DIAGRAM OF THE VSP9412A 4. 2. 2 DESCRIPTION 4. 2. 3 PINNING 4. 3 DDP 3315C - DISPLAY AND DEFLECTION PROCESSOR 4. 3. 1 BLOCK DIAGRAM OF THE DDP 3315C 4. 3. 2 DESCRIPTION 4. 3. 3 PINNING 4. 4 MSP341X MULTISTANDARD SOUND PROCESSOR 4. 4. 1 BASIC FEATURES OF THE MSP 341X 4. 4. 1. 1 Demodulator & NICAM Decoder Section 4. 4. 1. 2 DSP-Section (Audio Baseband Processing) -1- 5 5 5 5 5 6 7 10 10 10 12 13 13 13 13 14 14 14 14 14 15 15 15 15 15 16 17 17 17 17 18 18 19 20 20 22 23 24 24 26 28 28 28 29 CP830F Service Manual 4. 4. 1. 3 Analogue Section 4. 4. 1. 4 NICAM & FM/AM-Mono 4. 4. 1. 5 German 2-Carrier System (DUAL FM System) 4. 5 TDA4470 - MULTISTANDARD VIDEO-IF AND QUASI PARALLEL SOUND PROCESSOR 4. 5. 1 DESCRIPTION 4. 5. 2 FEATURES 4. 5. 3 PINNING 4. 5. 4 BLOCK DIAGRAM 4. 6 TDA894XJ STEREO AUDIO AMPLIFIER 4. 6. 1 FEATURES 4. 7 TDA835XJ VERTICAL AMPLIFIER 4. 7. 1 TDA8357J 4. 7. 2 TDA8358J 4. 8 TDA6107Q 4. 9 24C16 - 16 KB EEPROM 4. 10 STR - F6654 4. 10. 1 GENERAL DESCRIPTION 4. 10. 2 FEATURES 4. 10. 3 BLOCK DIAGRAM 4. 10. 4 PIN DESCRIPTION 4. 10. 5 CONTROL PART - ELECTRICAL CHARACTERISTICS 4. 10. 6 MOSFET ELECTRICAL CHARACTERISTICS 5 CP830 CHASSIS DESCRIPTION 5. 1 BLOCK DIAGRAM 5. 2 IF SECTION 5. 2. 1 BLOCK DIAGRAM 5. 2. 2 VISION IF AMPLIFIER 5. 2. 3 TUNER-AND VIF-AGC 5. 2. 4 FPLL, VCO AND AFC 5. 2. 5 VIDEO DEMODULATION AND AMPLIFIER 5. 2. 6 SOUND IF AMPLIFIER AND SIF-AGC 5. 2. 7 QUASI-PARALLEL-SOUND (QPS) MIXER 5. 2. 8 STANDARD SWITCH 5. 2. 9 L SWITCH 5. 2. 10 INTERNAL VOLTAGE STABILISER 5. 3 VIDEO / RGB 51 5. 3. 1 FRONT END 5. 3. 1. 1 CVBS Front-End 5. 3. 1. 2 Input Selector 5. 3. 1. 3 Signal Levels And Gain Control 5. 3. 1. 4 Synchronization 5. 3. 1. 5 Chroma Decoder 5. 3. 1. 6 Luminance Processing 5. 3. 1. 7 RGB Front-End 5. 3. 1. 8 Signal Processing 5. 3. 1. 8. 1 Horizontal Prescaler 5. 3. 1. 8. 2 Noise Reduction 5. 3. 1. 8. 3 Noise Measurement 5. 3. 1. 8. 4 Operation Modes -2- 29 29 29 32 32 32 32 33 34 34 35 35 37 39 40 41 41 41 41 42 42 43 44 44 45 45 46 46 46 47 47 47 47 47 47 47 47 48 48 48 48 48 48 48 48 49 49 49 CP830F Service Manual 5. 3. 1. 8. 5 Digital 656 Output 5. 3. 2 BACK END 5. 3. 2. 1 Digital Input Interface 5. 3. 2. 2 Horizontal Scaler 5. 3. 2. 3 Luma Contrast and Brightness 5. 3. 2. 4 Black Level Expander/Compressor (BLEC) 5. 3. 2. 5 Luma Sharpness Enhancer (LSE) 5. 3. 2. 6 Dynamic Peaking 5. 3. 2. 7 Luma Transient Improvement (LTI) 5. 3. 2. 8 Mixing of Dynamic Peaking and LTI 5. 3. 2. 9 Chroma Transient Improvement 5. 3. 2. 10 Analog Back End 5. 3. 2. 11 Analog RGB Insertion 5. 3. 2. 12 CRT Measurement and Control 5. 3. 2. 13 Synchronization and Deflection 5. 3. 2. 14 EHT Compensation 5. 4 MICROCONTROLLER 5. 4. 1 MICROCONTROLLER FEATURES 5. 4. 2 ACQUISITION FEATURES 5. 4. 3 PORTS 5. 4. 4 -CONTROLLER I/O PIN CONFIGURATION AND FUNCTION TABLE 5. 4. 5 TUNING 5. 4. 6 AUTOMATIC PICTURE FORMAT SWITCHING 5. 4. 6. 1 WSS Data 5. 4. 6. 2 SCART Pin 8 Data (Slow Switching) 5. 4. 6. 3 Picture Format Description 5. 4. 6. 3. 1 16:9 CRT 5. 4. 6. 3. 2 4:3 CRT 5. 4. 7 EXTERNAL SOURCE CONTROL LOGIC 5. 4. 8 OVER CURRENT PROTECTION 5. 5 TELETEXT DISPLAY 5. 6 SOUND PROCESSING 5. 6. 1 ANALOGUE SOUND IF - INPUT SECTION 5. 6. 2 QUADRATURE MIXERS 5. 6. 3 PHASE AND AM DISCRIMINATION 5. 6. 4 NICAM DECODER 5. 6. 5 DSP SECTION 5. 6. 6 SOUND MODE SWITCHING 5. 7 SOUND AMPLIFICATION 5. 7. 1 POWER AMPLIFIER 5. 7. 2 MODE SELECTION 5. 8 VERTICAL DEFLECTION 5. 8. 1 FLYBACK VOLTAGE 5. 8. 2 PROTECTION 5. 8. 3 GUARD CIRCUIT 5. 8. 4 DAMPING RESISTOR 5. 8. 5 EAST-WEST AMPLIFIER (TDA8358J ONLY) 5. 9 POWER SUPPLY (STR F6654) 5. 9. 1 STR-F6654 GENERAL DESCRIPTION -3- 49 49 49 49 49 49 50 50 50 50 50 51 51 51 52 52 52 52 53 53 53 54 54 54 55 55 55 56 57 58 58 59 59 59 59 60 60 60 60 60 60 61 61 61 61 61 61 61 61 CP830F Service Manual 5. 9. 2 POWER SUPPLY PRIMARY PART OPERATIONS 5. 9. 2. 1 Start -up Circuit: VIN 5. 9. 2. 2 STR-F6654 Oscillating Operation 5. 9. 2. 3 STR-F6654 Protection Circuits 5. 10 TV START-UP, TV NORMAL RUN AND STAND BY MODE OPERATIONS 5. 10. 1 TV START-UP OPERATIONS 5. 10. 1. 1 Schematic Diagram For Start-Up Operations 5. 10. 1. 2 TV Start-Up And Microcontroller Initialisation 5. 10. 2 TV NORMAL RUN AND STAND-BY MODE OPERATIONS 5. 10. 2. 1 TV On Normal Run Mode 5. 10. 2. 2 TV Set On Stand-By Mode SERVICE PARTS LIST 6. 1 DTH-29U7ZL 6. 2 DTG-2881ZL EXPLODED VIEW 7. 1 DTH-29U7 7. 2 DTH-29U8 7. 3 DTH-2881 7. 4 DTH-28W8 7. 5 DTG-28W9 PRINTED CIRCULT BOARD 8. 1 MAIN PCB 8. 2 CRT PCB 8. 3 PFC PCB SCHEMATIC DIAGRAM 61 62 63 64 65 65 65 65 67 67 70 72 72 80 88 88 89 90 91 92 93 93 94 95 96 6 7 8 9 -4- CP830F Service Manual DOCUMENT HISTORY VERSION V1. 00 V1. 01 DATE 18/11/02 22/11/02 COMMENTS Creation of document (Author M Hearn) for project CP830 100Hz TV. Reformatting of the document, plus insertion of Document History section 1 MAIN FEATURES 1. 1 SPECIFICATIONS 1. 1. 1 GENERAL TV standard Colour system Sound system Power consumption Sound Output Power Speaker Teletext system Aerial input Channel coverage Tuning system Visual screen size Channel indication Program Selection Aux. terminal Tuner AV PAL - SECAM B/G D/K, PAL I/I, SECAM L/L PAL, SECAM PAL, SECAM, PAL 60, NTSC M, NTSC 4. 43 NICAM B/G, I, D/K, L, FM 2Carrier B/G, D/K 29"(4:3) Real Flat :84W approx. 7W x 2 (at 60% mod, 10%THD) 12W 8 ohm x2 9 pages memory FASTEXT (FLOF or TOP) 75 ohm unbalanced Off-air channels, S-cable channels and hyperband frequency synthesiser tuning system 28" : 66cm 29" : 68cm On Screen Display 100 programmes EURO-SCART 1 : Audio / Video In and Out, R/G/B In, Slow and Fast switching. [. . . ] The main task of the luminance processing is to remove the colour carrier by means of a notch filter. For PAL and SECAM operation a baseband delay line is used for U and V signals. This can be used as comb filter in NTSC operation (only for chrominance). The RGB input from SCART is used -47- CP830F Service Manual as an overlay for the CVBS channel (RGB+FBL). 5. 3. 1. 2 Input Selector The analog CVBS or SVHS luma signal are fed to the inputs CVBS1. . . 7 of VSP94x2A (amplitude 0. 5. . . 1. 5 V pp ). A second signal (SVHS Chroma) can be selected and fed to the other ADC. After clamping to the back porch both signals are AD-converted with an amplitude resolution of 9 bit. The AD conversion is done using a 20. 25 MHz free-running stable crystal clock. Before the A to D conversion the signals are lowpass filtered to avoid antialias effects. A signal addition is performed to output a CVBS signal even when separate Y/C signals are used at input. 5. 3. 1. 3 Signal Levels And Gain Control To adjust to different CVBS input voltages a digitally working automatic gain control is implemented. Input voltages in the range between 0. 6 to 1. 8 V pp can be applied to the CVBS inputs. 5. 3. 1. 4 Synchronization After elimination of the high frequent components of the CVBS signal by a low pass filter, horizontal and vertical sync pulses are separated. The time constant is adjusted between fast and slow behaviour to accommodate different input sources (e. g. 5. 3. 1. 5 Chroma Decoder The digital multistandard chroma decoder is able to decode NTSC and PAL signals with a subcarrier frequency of 3. 58 MHz and 4. 43 MHz as well as SECAM signals with automatic standard detection. The TV controller software has configured the colour decoder to operate in automatic detection mode. When the signal source comes from the tuner, only SECAM and PAL (50Hz) standard are enabled. In AV mode or when program number 0 is selected the following standards are also enabled : NTSC M, NTSC 4. 43 and PAL 60. 5. 3. 1. 6 Luminance Processing A luminance notch filter is implemented to separate the chroma information from the luminance. Depending on the colour standard, one out of three different notch characteristics is chosen ( PAL , NTSC , SECAM ) automatically. 5. 3. 1. 7 RGB Front-End An analogue RGB input port for an external RGB source is available. 5. 3. 1. 8 Signal Processing 5. 3. 1. 8. 1 Horizontal Prescaler The main application of the horizontal prescaler is the conversion of the number of pixels coming form the 40. 5/20. 25 MHz pixel clock domain down to the number of pixels stored in the memory (factor 2/3). [. . . ] latch circuit This circuit sustains an output low from the STR-F6654 internal oscillator and stops operation of the power supply when overvoltage protection (OVP) and thermal shutdown (TSD) circuit are under operation -64- CP830F Service Manual thermal shutdown circuit (TSD) This circuit triggers the latch circuit when the frame temperature of STR-F6654 IC exceeds 140 C overvoltage protection circuit (OVP) This circuit triggers the latch circuit when the Vin voltage exceeds 22V (typ. ) 5. 10 TV START-UP, TV NORMAL RUN AND STAND BY MODE OPERATIONS 5. 10. 1 TV START-UP OPERATIONS 5. 10. 1. 1 Schematic Diagram For Start-Up Operations I826 S/B 3. 3V I827 S/B 2. 5V S/B 5V 42 9 49 11 I701 MICOM 5. 10. 1. 2 TV Start-Up And Microcontroller Initialisation - When SW801 power switch is pushed, main AC voltage is applied to T801 transformer (after rectification by D801. . . D804 diodes). Then, T801 SMPS transformer starts operating and supplies DC voltage to I823(5V regulator), to I826(3. 3V regulator) and to I827(2. 5V regulator). - These regulators provide 3. 3V/2. 5V DC voltage to I701 microcontroller power supply pins (pins 42/9, pins 11/44) and to the reset pulse circuit which provides reset pulse to I701 microcontroller reset pin (pin 8). Its power pin (pin 52) is set to high which allows delivery of power supply voltages (123V, 8V, 5V. . . ). [. . . ]